Careers

High-Speed PCB Hardware Development Engineer (CPO)

Work Location:Xi'an / Shanghai

Education Requirement: Bachelor's degree or above in Electronic Information, Microelectronics, Communications, Optoelectronic Engineering, or related fields

Job Responsibilities

• Responsible for the full-process development of dedicated test PCB boards for CPO/NPO co-packaged optical engines: requirements decomposition, schematic design, component selection, multi-layer PCB stack-up architecture planning, layout & routing, DFM/DRC review, output of production Gerber files, BOM, and assembly documents, and follow-up on board fabrication, SMT assembly, and mass-production introduction;

• Independently complete on-board SPI communication bus hardware circuit design, level matching, anti-interference routing, and joint debugging, to realize register configuration, parameter read/write, status monitoring, and fault command interaction for optical engine optoelectronic chips / modulators / photodetectors, and rapidly locate SPI timing anomalies, packet loss, and communication failures. Knowledge of the OIF CPO Framework is preferred;

• Responsible for PCB digital control circuit + high-speed differential transmission link design, undertaking 100G/200G high-speed transmission line PCB layout & routing, and controlling impedance control, differential length matching, crosstalk suppression, return paths, and termination matching;

• Lead SI signal integrity and PI power integrity simulation, self-inspection, and optimization; pre-assess high-speed link and power distribution network risks through simulation, complete impedance, timing, and voltage-drop simulation analysis, and output simulation reports and remediation plans;

• Responsible for test PCB power-on debugging, SPI waveform capture, 100G/200G high-speed signal eye-diagram measurement, functional verification, and reliability screening; work with optical chip, electrical chip, and packaging test teams to complete software-hardware joint debugging, problem review, and version iteration.

Job Requirements

Basic Threshold

• Bachelor's degree or above in Electronic Information, Microelectronics, Communications, Optoelectronic Engineering, or related fields, with 3+ years of high-speed + digital mixed PCB hardware design experience

• Experience in optical modules, silicon photonics, CPO/NPO optical engines, or high-speed optoelectronic test board development is preferred

Skill Requirements

• Proficient in mainstream PCB design tools such as Cadence Allegro / PADS / Altium Designer, and skilled in high-order multi-layer mixed-material boards and high-density interconnect PCB design

• Proficient in SPI communication hardware circuit design, familiar with multi-slave SPI topology, level shifting, clock timing matching, grounding and anti-interference routing, able to independently complete hardware bring-up and fault diagnosis

• Hands-on design experience with 100G/200G high-speed differential transmission line PCBs, familiar with high-speed dielectric materials, impedance calculation, stack-up design, via optimization, isolation shielding, and trace-length management

• Professional SI/PI simulation design capability, proficient in SI/PI simulation tools, able to independently complete signal integrity and power integrity simulation self-inspection, preemptively mitigate crosstalk, reflection, power noise, and transient voltage-drop risks, and output simulation optimization solutions

• Proficient in using oscilloscopes, logic analyzers, high-speed sampling oscilloscopes, impedance testers, and other instruments, able to independently complete SPI communication debugging, 100G/200G high-speed eye-diagram testing, and hardware fault localization

• Capable of digital control power supply, MCU/FPGA control logic, IO level matching, and digital-analog mixed grounding isolation design

Major Bonus Points

• Hands-on development and delivery experience with CPO optical engines and silicon photonics chip test boards / optoelectronic coupling PCBs is preferred

• Knowledge of high-speed optical interconnect, gold fingers / high-speed connectors, and co-packaged optoelectronic hardware adaptation design is preferred

• Understanding of low-level SPI firmware driver coordination, able to perform software-hardware co-debugging of timing, is preferred

Overall Qualities

• Independently manage the full project process, advancing from design → simulation → fabrication → debugging → iteration in a closed loop

• Rigorous and meticulous, able to identify core risks in high-speed and digital-analog mixed PCBs, with strong problem localization and resolution capabilities

• Smooth cross-department coordination, able to collaborate with optics, test, process, and firmware teams on joint problem-solving

Position Highlights

• Enter the core CPO next-generation optoelectronic co-packaging track, with industry-leading hardcore technology and high growth potential;

• Core development of a dedicated optical engine test hardware platform, with high technical barriers and a core-backbone development channel;

• Fully equipped R&D and test instruments, a pure technical atmosphere, and a focus on hard-tech R&D delivery.

What We Offer

• Company benefits: five social insurances and housing fund, paid annual leave, and rental subsidy

• Career development: complete technical growth path and a multi-team collaboration platform

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