Careers

• Responsible for the circuit design and tape-out verification of high-speed driver chips (Driver) and transimpedance amplifier (TIA) chips, targeting data center optical communications, high-speed interconnect, and other application scenarios for CPO optical engines. Main responsibilities include:

• Circuit architecture design, pre-layout simulation, and layout guidance for high-speed Driver and TIA chips at single-lane 100 Gbps and above;

• Design and optimization of high-speed signal links (CTLE, equalizer, output-stage driver);

• High-speed signal integrity analysis (eye diagram, jitter, reflection, crosstalk, bandwidth, etc.); collaboration with layout engineers on physical implementation in FinFET / advanced CMOS processes;

• Chip bring-up testing, high-speed parameter testing, and debugging;

• Authoring design documents and test reports, and participating in design reviews.

Job Requirements

• 3+ years of high-speed analog/mixed-signal chip design experience; candidates with successful tape-out experience of single-lane 100 Gbps or above Driver or TIA are preferred;

• Proficient in high-speed circuit design: broadband amplifiers, TIA, Driver, CTLE, equalizers, etc.;

• Familiar with FinFET process nodes (12 nm and below CMOS preferred), with advanced-node tape-out experience;

• Proficient in EDA tools such as Cadence Virtuoso, Spectre / AMS / HSpice;

• Familiar with high-speed signal integrity analysis; EM simulation experience (HFSS / ADS / EMX, etc.) is preferred;

• Knowledge of SerDes architectures (PAM4/NRZ) and CDR/PLL design is preferred;

• Optoelectronic integration (silicon photonics) chip co-design experience is a plus;

• Good teamwork and communication skills, able to independently undertake module-level or chip-level design tasks.

Company Benefits

• Competitive compensation and benefits: five social insurances and housing fund, paid annual leave, and rental subsidy

4. Analog IC Engineer

Location: Xi'an / Shanghai

Education: Bachelor's degree or above in Integrated Circuits, Electronic Engineering, Information Science and Technology, or related fields

Job Responsibilities

• Advanced-node design (including but not limited to 12 nm and below processes), analog amplifier design, ADC and DAC design, power module design (BGR and LDO and other supply and bias modules), and low-speed stable transimpedance amplifier design, as well as stability and robustness analysis and tuning.

Job Requirements

• Experience in advanced-node design (including but not limited to 12 nm and below processes), familiar with analog amplifier design, ADC and DAC design, power module design (BGR and LDO and other supply and bias modules), and low-speed stable transimpedance amplifier design, as well as stability and robustness analysis and tuning.

Company Benefits

• Competitive compensation and benefits: five social insurances and housing fund, paid annual leave, and rental subsidy