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Recently, the research team of Professors Wang Binhao and Zhang Wenfu at the State Key Laboratory of Ultrafast Optical Science and Technology has made a series of advances in the field of silicon-based optical interconnect chips.

On May 25, 2026, Huawei released the "Tao (τ) Law" for the development of the semiconductor industry in the post-Moore era, proposing a new principle of using "time (τ) scaling" instead of "geometric scaling" to guide the evolution of semiconductors and electronic systems.

Optical interconnect technology is key to achieving time delay (τ) compression at the system level and supporting the Tao (τ) Law. It can break through the "power wall" and "communication wall" limitations of intelligent computing systems, enable efficient collaboration of ultra-large-scale computing clusters, and support the construction of next-generation AI computing infrastructure.

Facing the optical interconnect needs of Co-Packaged Optics (CPO) and next-generation AI computing infrastructure, the team at the Xi'an Institute of Optics and Precision Mechanics of the Chinese Academy of Sciences has achieved systematic progress from core devices to optoelectronic integration around silicon photonic chips and compatible CMOS electronic chips:

In terms of silicon photonic devices, the team has developed a silicon-germanium avalanche photodetector (Si-Ge APD) with a gain-bandwidth product of 7564 GHz, a micro-ring modulator (MRM) with a 1 dB bandwidth exceeding 100 GHz, and a silicon-based Mach-Zehnder modulator (MZM) with a 1 dB bandwidth exceeding 67 GHz, laying the device foundation for high-bandwidth, low-power optical engines;

In terms of array silicon-based optical transmitter chips, the team has completed the development of multi-channel silicon photonic transmitters, realizing a large free spectral range (FSR) microdisk modulator array (MDM) compatible with 16 channels. Through the collaborative integration of quantum dot mode-locked lasers and MRM arrays, two types of 2 Tbps optical transmitters have been realized, with 8 channels at 200 GHz spacing and 16 channels at 100 GHz spacing, respectively;

In terms of supporting circuits, a 28nm CMOS high-speed electronic chip has been developed, with both the driver and transimpedance amplifier circuit bandwidths exceeding 60 GHz, supporting 200 Gbps PAM4 transmission and 280 Gbps PAM4 reception signals, achieving an energy efficiency of 0.67 pJ/bit and a bandwidth density of 4.9 Tbps/mm². Through optoelectronic fusion and 3D integration, complete transceiver link collaboration has been achieved.

These achievements have built a high-bandwidth, low-power, high-density optical interconnect solution centered on micro-ring optical engines, which can directly adapt to the CPO architecture. A single engine has a data throughput of > 2 Tbps, featuring low latency and a compact package form, providing complete interconnect technical support from devices to systems for next-generation AI computing infrastructure.

Figure 1 Schematic diagram of the 2026 silicon photonic interconnect chip research progress at XIOPM

01. High-performance silicon photonic devices

01. Silicon-germanium avalanche photodetector with a gain-bandwidth product of 7564 GHz

Dr. Xue Jintao, doctoral student Cheng Chao (co-first authors), and others in the team developed a laterally Separate Absorption Charge Multiplication (SACM) structure Si-Ge APD, achieving a gain-bandwidth product (GBP) of 7564 GHz, which can effectively improve the receiving sensitivity of high-speed communication systems. According to literature research, this GBP is currently the highest level in the world.

The lateral SACM structure spatially separates the germanium absorption region from the doping region. By precisely controlling the electric field distribution, it maximizes the multiplication effect in the silicon region while suppressing ionization in the germanium region, effectively improving device gain and reducing dark current. A tapered waveguide is introduced at the front end of the device to reduce coupling loss, and a distributed Bragg reflector is integrated at the back end to achieve secondary absorption, effectively improving device responsivity.

Test results show that high-speed signal reception from 64 to 200 Gbps has been successfully achieved at low input optical power, with 100 Gbps NRZ and 200 Gbps PAM4 sensitivities of -17.1 dBm and -9.6 dBm, respectively, both meeting the HD-FEC threshold.

Figure 2 Schematic diagram of the device structure and high-speed eye diagrams

The related results were published under the title "High-speed Si-Ge avalanche photodiode with a gain-bandwidth product of 7564 GHz".

Paper link: https://doi.org/10.1038/s41467-026-70461-9

02. Silicon-based micro-ring modulator with a 1 dB bandwidth greater than 110 GHz

Doctoral students Bao Shenlei and Yang Yihao (co-first authors) and others in the team developed a high-bandwidth silicon-based MRM integrated with a T-type inductive peaking network, with a single-channel transmission rate exceeding 400 Gbps.

Relying on collaborative design based on an equivalent circuit model, the team innovatively embedded a T-Coil network composed of two mutually coupled inductor coils into the parasitic parameter network of the modulator. The MRM modulator developed based on a standard silicon photonics process has a 1 dB electro-optic bandwidth exceeding 110 GHz, demonstrating an extremely high bandwidth level for silicon-based micro-ring modulators.

Figure 3 Structure diagram of the high-bandwidth micro-ring modulator and high-speed eye diagrams

The related results were published under the title "Ultra-High Bandwidth Silicon Microring Modulator with T-Coil Inductive Peaking for > 400 Gbps Transmission" at OFC M2A.2 (2026).

03. Ultra-compact serpentine segmented Mach-Zehnder modulator

Doctoral student Liu Qian and others, addressing the issue of limited MZM device size, proposed a silicon-based MZM based on a serpentine segmented electrode structure, arranging three modulation segments in a serpentine manner, combined with a ground-signal single-arm push-pull traveling wave electrode, achieving efficient electro-optic conversion within a compact area of about 1 mm².

Test results show that at 0 V bias, the 1 dB bandwidth exceeds 67 GHz, and the modulation efficiency reaches 1.14 V·cm. Using this modulator, OOK signal transmission from 64 Gbaud to 192 Gbaud was experimentally demonstrated.

Figure 4 Structure diagram of the serpentine segmented electrode MZM and high-speed eye diagrams

The related results were published under the title "High-Bandwidth Serpentine Segmented Silicon Photonic Mach-Zehnder Modulator for 192 Gbaud Transmission" at OFC W2A.14 (2026).

04. Mach-Zehnder modulator with a 1 dB bandwidth greater than 67 GHz

Doctoral student Liu Qian and Dr. Xue Jintao (co-first authors) and others, addressing the issue of limited MZM modulation bandwidth, introduced periodic metal "tabbed structures" into the traditional traveling wave electrode to construct an impedance matching network, significantly improving the velocity matching between microwaves and optical waves and enhancing the spatial overlap between the electric field and the optical field.

Figure 5 Structure diagram of the tabbed-electrode MZM and high-speed eye diagrams

The bandwidth of this modulator is increased by 69% compared with the traditional structure; the half-wave voltage is 4.5 V, and the modulation efficiency reaches 0.9 V·cm, an improvement of 24% over the traditional structure. High-speed signal transmission of 280 Gbps PAM6 and 256 Gbps PAM4 was experimentally demonstrated, showing its application potential in optical interconnect scenarios such as optical modules and Near-Package Optics (NPO).

The related results were published under the title "A 280 Gbps PAM6 Silicon Photonic Tabbed-Electrode Mach-Zehnder Modulator with Co-Optimized Modulation Efficiency and Electro-Optic Bandwidth" at OFC Th2A.11 (2026).

02. Large-capacity array silicon-based optical transmitter chips

16-channel large-FSR microdisk modulator array chip

Doctoral student Bao Shenlei and others, addressing the issue of limited large free spectral range (FSR) in multi-channel wavelength division multiplexing systems, developed a 4 Tbps 16-channel DWDM optical transmitter chip based on an extended-depletion silicon-based MDM array.

The team reduced the radius of the MDM to about 4.1 µm, successfully achieving an ultra-large FSR of 19.6 nm in the O-band. This 16-channel array successfully supports 16×256 Gbps PAM4 high-speed signal transmission.

Figure 6 Architecture diagram of the microdisk modulator

The related results were published under the title "A 4 Tbps 16-Channel DWDM Transmitter Using Extended-Depletion Silicon Photonic Microdisk Modulator Array" at OFC W2A.12 (2026).

2Tbps (8×256Gbps) quantum dot laser and high-speed micro-ring modulator collaboratively integrated optical transmitter chip

Doctoral student Bu Xianglin and others, in collaboration with the Chen Siming team at the Institute of Semiconductors of the Chinese Academy of Sciences and Hunan Huisi Optoelectronics Technology Co., Ltd., developed a highly integrated DWDM transmitter based on a 200 GHz spacing quantum dot mode-locked laser and a cascaded silicon-based micro-ring array.

The team used a 200 GHz spacing quantum dot mode-locked laser to provide a high-quality multi-wavelength light source, driving an 8-channel silicon-based micro-ring modulator array, achieving 256 Gbps PAM4 high-speed transmission per channel and reaching a single-fiber rate of more than 2 Tbps.

Figure 7 Architecture of the 8-channel transmitter driven by a quantum dot mode-locked laser and high-speed eye diagrams

The related results were published under the title "An 8×256 Gbps DWDM Silicon Photonic Microring Transmitter Using a 200GHz Spaced Quantum-Dot Comb Laser" at OFC M1B.2 (2026).

2Tbps (16×128Gbps) quantum dot laser and high-density micro-ring modulator collaboratively integrated optical transmitter chip

Doctoral student Bu Xianglin and others, in collaboration with the Chen Siming team at the Institute of Semiconductors of the Chinese Academy of Sciences and Hunan Huisi Optoelectronics Technology Co., Ltd., verified a single-bus 16-channel, 100 GHz spacing silicon photonic micro-ring transmitter driven by a quantum dot mode-locked laser.

Figure 8 Architecture of the 16-channel transmitter driven by a quantum dot mode-locked laser and high-speed eye diagrams

In addition, the team proposed a wavelength locking scheme based on the photocurrent of the MRM's own PN junction. This method uses the modulator itself for wavelength monitoring, without the need for an additional integrated monitoring photodetector, achieving precise alignment of 16 channels with the comb lines while significantly reducing on-chip optical loss.

This system achieved a total transmission rate of 128 Gbps PAM4 per channel and 2 Tbps per fiber, with all channels maintaining clear eye diagrams and channel crosstalk below −20 dB.

The related results were published under the title "A 16×128 Gbps DWDM Wavelength-Locked Silicon Photonic Microring Transmitter Enabled by a Quantum-Dot Comb Laser" at OFC M2A.4 (2026).

200Gbps 28nm CMOS high-speed electronic chip

Facing the high requirements of CPO and optical I/O for electronic chip energy efficiency and bandwidth density, doctoral student Yang Yihao and others developed a 28nm CMOS driver and amplifier electronic chip suitable for silicon photonic 3D integration.

Through collaboratively equalizing over-peaking and complex-zero CTLE, both the transmit and receive parts achieved > 60GHz bandwidth, with group delay variation of less than 2.3 ps. The transmit driver circuit uses an asymmetric bias driver stage, effectively compensating for the nonlinearity of the micro-ring modulator and supporting 200 Gbps PAM4 optical transmission; the receive transimpedance amplifier circuit achieves 65 GHz bandwidth in a single-ended topology, and electrical testing successfully receives 280 Gbps PAM4 signals. The overall energy efficiency of the chip is 0.67 pJ/bit, and the bandwidth density reaches 4.9 Tbps/mm².

Figure 9 Architecture of the 28 nm CMOS transceiver electronic chip

The related results were published under the title "A 200 Gbps 0.67pJ/bit Transceiver Front-end for silicon-photonics with group delay and nonlinear adjustment in 28 nm CMOS" at RFIC Tu2J (2026).